Some Assembly Required: Assembly Language Programming with the AVR Microcontroller
Timothy S Margush
A family of internationally popular microcontrollers, the Atmel AVR microcontroller series is a low-cost hardware development platform suitable for an educational environment. Until now, no text focused on the assembly language programming of these microcontrollers. Through detailed coverage of assembly language programming principles and techniques, Some Assembly Required: Assembly Language Programming with the AVR Microcontroller teaches the basic system capabilities of 8-bit AVR microcontrollers.
The text illustrates fundamental computer architecture and programming structures using AVR assembly language. It employs the core AVR 8-bit RISC microcontroller architecture and a limited collection of external devices, such as push buttons, LEDs, and serial communications, to describe control structures, memory use and allocation, stacks, and I/O. Each chapter contains numerous examples and exercises, including programming problems.
By studying assembly languages, computer scientists gain an understanding of the functionality of basic processors and how their capabilities support high level languages and applications. Exploring this connection between hardware and software, this book provides a foundation for understanding compilers, linkers, loaders, and operating systems in addition to the processors themselves.
different data pathways for program and data memory, the addressing and data transfer can be tailored differently to fit the needs of each. Registers The AVR processor has 32 general purpose 8-bit registers. These are named R0 through R31. Data that is currently being manipulated by the program must be located in these registers. Special purpose registers such as the program counter (PC), instruction register, and instruction decode register play an important role in the operation of the
should be located). The AVR assembler allocates space in each of the three segments, code, data, and EEPROM, as needed. Directives are used to tell the assembler which segment it should be using at any time. These three segments correspond to the physically separate storage areas accessed by this processor. Because of the Harvard architecture characterizing this processor, machine instructions must be stored in flash memory. Although instructions are assembled in what is called the code segment,
the board includes external pull-up resistors in the switch circuit. Enabling or +5 V Pullup Connected to port pin Button GND FIGURE 3.5 The STK-500 pushbutton input circuit. Assembly Language ◾ 95 disabling the internal pull-up resistors is just part of the I/O port configuration task. The Toggler Program Memory allocation in the Toggler program is very simple. There are essentially three variables that would be considered global to the program. Of course, the program does not have
Some Assembly Required more complex control structures. At the machine level, the ability to alter the sequential flow of execution is accomplished using a branch (or jump) instruction. High level languages use structured statements such as if and while to deviate from sequential flow of control. Ultimately, such control structures must be reduced to the machine-level branch instructions; the compiler is responsible for the proper translation. We will study control structures in more detail
Required PC can also be altered by a reset signal (causing PC to be set to zero), or by executing a branch, jump, call, or return instruction. An interrupt will also change the value in PC. The difference between an instruction fetch and a data load (via LPM) is where the address is found, whether it is a byte or word address, where the data is sent, and the size of the data. An instruction fetch uses the PC as a word address and loads a word into the instruction queue. The LPM instruction